以下是小编精心整理的电子开发工程师英文简历表格（共含10篇），希望对大家有所帮助。同时，但愿您也能像本文投稿人“anchor307”一样，积极向本站投稿分享好文章。
电子开发工程师英文简历表格
似乎对很多人来说，他们在实施简历书写时，都会非常关注简历的外在效果，在很多人的认知里，只有那些外在效果十分出众的个人简历，才能够在递交至招聘方手中受，吸引到他们的关注，并且在求职过程中增加就职的几率性。但他们却忽视了，太过于注重外在效果的个人简历有时也并不一定可以发挥出对他们而言比较满意的效果。因为这种简历的制作往往会呈现出外在观赏性效果强，而实际内容却不佳的'水准。
除了上面提及的问题之外，还有一点因素也是求职者必须有所关注的，那就是简历的叙述意义。其实价值的衡量标准在于简历的书写理念。简历本身是一种表达能力非常强的表达方式，所以我们必须要关注它的叙述意义。若失去了简历能够表达出来的运用意义，那么简历也很难凸显出求职者的个人能力。
| Name： yjbys | Hukou：Shanghai | ||
| Residency：Shanghai | Work Experience： | ||
| Current Salary： | Tel： | ||
| E-mail：/jianli | |||
| Career Objective | |||
| Desired Industry： | Electronics/Semiconductor/IC ,Science/Research ,Government ,Others ,Testing, Certification | ||
| Desired Position： | Senior Hardware Engineer ,Semiconductor Technology, Branch Office Manager ,Chief Representative ,Research Specialist Staff | ||
| Desired address： | Shanghai ,Hongkong ,Beijing ,Taiwan ,Macao | Desired Salary： | Negotiable |
| Work Experience | |||
| 20xx/06—Present | ***Company | ||
| Industry: Electronics/Semiconductor/IC Intel Flash Engineering Department Individual Contributor Responsibilities： I have been working in Intel Flash Assembly & Test Engineering Department as an Individual Contributor since June of 20xx. Being Leader of ATE Yield team, I have been working with the team members to improve the products yield. Our efforts are paid off: The yield of year 20xx has been dramatically increased than that of year 20xx. The yield of all products, consecutively meets the goal. The total amount of cost saving due to yield improvement is more than $1 million compared with year 20xx. Being the Leader of Board Repair Team in ATE, I worked with my team members, setup a set of new procedure to replace the current one, I defined the schedule, divided the roles & responsibilities among team members, follow up the progress. Finally, the team has made a great cost saving of $2.5M in 20xx. Report Directly to: Department ManagerNumber of Subordinate: 14 Reference: Bao Powel Achievements: Being Leader of ATE Yield team, I have been working with the team members to improve the products yield. Our efforts are paid off: The yield of year 20xx has been dramatically increased than that of year 20xx. The yield of all products, consecutively meets the goal. The total amount of cost saving due to yield improvement is more than $1 million compared with year 20xx. Being the Leader of Board Repair Team in ATE, I worked with my team members, setup a set of new procedure to replace the current one, I defined the schedule, divided the roles & responsibilities among team members, follow up the progress. Finally, the team has made a great cost saving of $2.5M in 20xx. | |||
| 20xx/01—20xx/05 | Intel(Shanghai) Technology Development Ltd.Company | ||
| Industry: Electronics/Semiconductor/IC Intel STTD-China Department Electronics Development Engineer Responsibilities： I had been working in STTD-China since Jan 20xx to May 20xx as a senior module engineer. At that time, as a main contributor of this project, we succeeded in developing a set of MASSIVELY PARALLEL CLASS TEST equipment, which is able to test more than 6700 units in one time. Report Directly to: Hopman Mark Number of Subordinate: 14 Reference: Bao Powel Reason for Leaving: I was transferred to Intel（Shanghai）Products Ltd. Company due to the internal re-organization in June of 20xx. Achievements: As a main contributor of STTD-China department, I co-work with my colleagues to succeed in developing a set of MASSIVELY PARALLEL CLASS TEST equipment, which is able to test more than 6700 units in one cycle. | |||
| 20xx/05—20xx/01 | Nanyang University of Science & Technology | ||
| Industry: Electronics/Semiconductor/IC Electronics & Electrical Engineering Department Research Fellow Responsibilities： I work in Electronics & Electrical Engineering Department of Nanyang University of Science & Technology as a Research Fellow. I majored at Gate Oxide Reliability Research in the duration. Report Directly to: Professor Pey Kin Leoh Subordinate: 3 Reference: Patrick Low Reason for Leaving: I completed the project which I undertook by myself, and want to do more challenging job. Achievements: In less than one year, I made a lot of experiments and acquired the wonderful data for the project by myself. | |||
| Project Experience | |||
| 20xx/01—Present | Assembly NPI (New Product Introduction) | ||
| Project Description: To introduce more products into Intel Flash Assembly factory, I join Assembly NPI team and work as the team leader. I coordinate with IE, Planner, Marketing guy and Engineer to select new product items, do demo in factory, and then qualify it. Responsibility: I am working as NPI Team leader and coordinate all team members, define the NPI candidate, make Assembly build plan, follow up the progress. | |||
| 20xx/01—20xx/12 | Marginal Electrical Boards Rescue | ||
| Project Description: To rescue some electrical boards of testing equipment, a Task Force team was built up and led by me. We categorized each kind of board, made historical failure analysis on each kind of board and around &2.5 million dollars was saved finally. Responsibility: Being the team leader, I took the job of data analysis, define each member's role, make program plan, coordinate each team member and follow up the progress. | |||
| 20xx/10—20xx/05 | Optimization the current Test Process Order for Flash Memory | ||
| Project Description: To simplify the current Test procedure and enhance the working efficiency, a Task Force team has been called and started by me. Responsibility: Being the Project leader, I take the main responsibility, such as, design, plan, organize and implement. | |||
| 20xx/05—20xx/12 | Test Yield of Flash memory Improvement | ||
| Project Description: To improve the test yield of different products, a Task Force team was built up and led by me. Being the team leader, I worked with all team members to dig out the failure root cause for each product, defined action taken plan for each emergency case, coordinated each team member and make pro-active plan to avoided unexpected things happen. Responsibility: Being the team leader of Improving Test Yield, coordinate each team member, make program plan and follow up. | |||
| Education and Training | |||
| 20xx/05—20xx/01 | Nanyang University of Science & Technology Microelectronics Doctorate | ||
| I worked in Nan yang University of Science & Technology as a Research Fellow. I major at Gate oxide Reliability research in the duration. | |||
| 20xx/03—20xx/03 | Seoul National University of Korea Microelectronics Others | ||
| I had been working in National Physical Lab of Seoul National University in Korea since March of 20xx to March of 20xx as a Post-doctor. Where I unhook the project of research & development of Carbon-Nan tube Biosensor. And only after one year, an EIS sensor based on CMOS technology has been successfully produced. And one SCI paper about it has been published in Semiconductor Science and Technology. | |||
| 20xx/03—20xx/03 | Shanghai Institute of Microsystems and Information Technology，Chinese Academy of Sciences Information Technology Doctorate | ||
| 20xx/09—20xx/03 | Nanjing University of Science & Technology Material Science and Engineering Master | ||
| Being a master student of this period, I have published one EI paper about Super-fine metal power's electrical characteristics. | |||
| 20xx/09—20xx/07 | Nanjing University of Science & Technology Material Science and Engineering Bachelor | ||
| 20xx/07—20xx/07 | Assistant Engineer in Quality Verification Department, Boiler Factory in Zhengzhou city of Henan resistant Engineer in Quality Verification Department | ||
| Professional Skills | |||
| Language Skills： | English: EXCELLENT Korean: AVERAGE | ||
| Computer Skills： | Technology skilled 96Month SAP understanding 8Month | ||
| Certificate： | 20xx/11 MCSE 20xx/06 CET6 | ||
| Self-appraisal | |||
| 7 years working experience of Semiconductor Industry and where 2 years overseas working/study experience. Smart working, innovation thinking and very talented creative working model. |
电子工程师英文简历表格
Sandy Lin 15/F,TOWER2 ,BRIGHT CHINA,BUILDING1,BEIJING.
BACKGROUND SUMMARY
Over eleven years of extensive computer/electronics experience.Versed in both digital and analog electronics withspecific emphasis on computer hardware/software.Special expertise in system and component evaluation.Network supervisor responsible for installing/maintaining Arcnet LAN system.Proficient in assembly and C programming languages.Excelent communication skills including written,verbal and interpersonal.
PROFESSIONAL WORK EXPERIENCE
Stevenson Data Systems,Los Angeles,CA 1981-1993
Components Evaluation Engineer 1992-1993
Responsible for the characterization and evaluation of, and approved vendors list for:Power supplies,oscillators,crystals,and programmable logic used in desktop and laptop computers.Evaluated and recommended quality components that increased product profitability.Created adn developed power supply test plan used for evqluating third party power supplies.Interacted with vendors to resolve problems associated with components qualification.Technical advisor for Purchasing.Promoted to engineer II.
Design Evaluation Engineer 1990-1992
Evaluated new computer product designs ,solving environmental problems on prototype computers.Conducted systems analysis on new computer profucts to ensure hardware,software and mechanical design integrity.Designed hardware and software for PC,ISA bus programmable load board used for environmental testing.Performed reliability lift testing on computer systems.Installed/maintained 20 user.Novell,Arcnet LAN system.Examined system and sub-system susceptibility to electrostatic discharge in order to meet IEC-801-2 industry standards.Analyzed complete power and load of computer system and subsystem to verify power and load estimations.
Assistant Engineer 1981-1990
Performed extensive hardware evaluation ion prototype computers,tested prototype units for timing violation using the latest state-of-the-art test equipment,digital oscilloscopes and logic analyzers.Performed emvironmental,ESD and acoustic testing.Designed and built a power-up test used to test prototype computers during cold boot.
EDUCATION
Bachelor of Science in Electrical Engineering
--University of Southern California 1990
Associate in Engineering Electronics
--University of Southern California 1981
Job descriptions emphasize candidate's accomploshments.
Work history is stated in reverse chronological order,with most recent employment listed first.
电子工程师求职英文简历表格
简历的好坏，关键在于这份简历给人的印象如何，因此，还必须对写好的简历进行必要的加工，对它进行编排打印。简历的`版式编排要美观大方，让人阅览起来一目了然。版式的效果好，简历翻开来第一印象就会特别好，这样招聘者会用心阅览下去。
大家最好不要用同一份简历去投递所有的职位，要讲究针对性，针对每一个公司和职位制作不同的简历。学会如何制作吸引人的简历，在简历中重点列举与所申请公司及职位相关的信息，弱化对方并不重视的内容，这样才容易脱颖而出。
下面是yjbys小编和大家分享的电子工程师求职英文简历表格，更多内容请关注个人简历网。
| Name: | yjbys | Nationality: | ||
| Current Place: | Height/Weight: | 1 | ||
| Marital Status: | Age: |
| Career Objective and Work experience |
| Preferred job title: | Electronics Engineer/Technician: Electronics Engineer 、Automation Control Engineer/Technician: 、Electronic Circuit Engineer/Technician(Simulation/Digital): | ||||||||||
| Working life: | 6 | Title: | No title | ||||||||
| Job type: | Full time | Expected Start date: | In a week | ||||||||
| Expected salary: | Preferred working place: | Guangzhou Guangdong province No preference | |||||||||
| Work Experience : |
|
| Educational Background |
| Name of School: | Nanchang University | ||||||||||||
| Highest Degree: | Associate | Date of Graduation: | -07-01 | ||||||||||
| Name of Major 1: | Applied Electronic Technology | Name of Major 2: | Electronic circuit design | ||||||||||
| Education experience: |
|
| Language Ability |
| Foreign Language: | Others | Level: | poor |
| Chinese level: | perfect | Cantonese Level: | normal |
| Relevant skills and abilities |
| MCU Design C51 KEIL51 Board Design Electronic Circuit Design PCB Design Protel99se |
·Name：Xu YJBYS ·Sex ：Male
·Folk：Han ·Birth place：Shan Dong
·Birthday：Aug.20,1984 · Clan： Communist Youth League
·Weight： 62kg ·Height：170cm
·Major ：Electrics Eingineering and Automation
·Degree：Bachelor's Degree ·Background：Regular college course
·Graduate Time：July · Education School: Xin Jiang University Link method
·Phone：13899824486
·Address：the south campus of the xinjiang university
·Post code：·E-mail：Regular courses level
In the shool ,I have got well trained in major and in ability.I have a strong basic theory and practice experience .In spare time, I read lots of books relating with my major
Computer&Eenglish level
I am familiar with the series of operation in network and operating system such as Windows and Office ,I am good at some softwares such as Auto CAD and EDA .I master some English for electric engineering ,so I can understand some electric books in English , Work Experience:
·Practised in Da Chi transformer company in Shan Dong province in Aug.
·Join in “come into the country” in Aug.
My love
Computer and English
电子研发工程师英文简历表格
一份好的简历不仅有主题突出的经历，而且有特点的包装和格式是吸引注用人单位人事经理的主要方面之一。如果使用各种字体格式，如斜体、大写、下划线、首字突出、首行缩进或尖头等等方式，有重点有节奏地表达思想。有些求职者以为另类的简历会让人耳目一新，所以往往追求新、奇的.特色。除非是你寻求的职位有些别样，最好是在简洁、醒目上下功夫，不要过于花哨，否则适得其反。
下面是yjbys小编和大家分享的电子研发工程师英文简历表格，更多内容请关注(/jianli)。
| Name： yjbys | Hukou：Shanghai | ||
| Residency：Shanghai | Work Experience： | ||
| Current Salary： | Tel： | ||
| E-mail：/jianli | |||
| Career Objective | |||
| Desired Industry： | Electronics/Semiconductor/IC ,Science/Research ,Government ,Others ,Testing, Certification | ||
| Desired Position： | Senior Hardware Engineer ,Semiconductor Technology, Branch Office Manager ,Chief Representative ,Research Specialist Staff | ||
| Desired address： | Shanghai ,Hongkong ,Beijing ,Taiwan ,Macao | Desired Salary： | Negotiable |
| Work Experience | |||
| 20xx/06—Present | ***Company | ||
| Industry: Electronics/Semiconductor/IC Intel Flash Engineering Department Individual Contributor Responsibilities： I have been working in Intel Flash Assembly & Test Engineering Department as an Individual Contributor since June of 20xx. Being Leader of ATE Yield team, I have been working with the team members to improve the products yield. Our efforts are paid off: The yield of year 20xx has been dramatically increased than that of year 20xx. The yield of all products, consecutively meets the goal. The total amount of cost saving due to yield improvement is more than $1 million compared with year 20xx. Being the Leader of Board Repair Team in ATE, I worked with my team members, setup a set of new procedure to replace the current one, I defined the schedule, divided the roles & responsibilities among team members, follow up the progress. Finally, the team has made a great cost saving of $2.5M in 20xx. Report Directly to: Department ManagerNumber of Subordinate: 14 Reference: Bao Powel Achievements: Being Leader of ATE Yield team, I have been working with the team members to improve the products yield. Our efforts are paid off: The yield of year 20xx has been dramatically increased than that of year 20xx. The yield of all products, consecutively meets the goal. The total amount of cost saving due to yield improvement is more than $1 million compared with year 20xx. Being the Leader of Board Repair Team in ATE, I worked with my team members, setup a set of new procedure to replace the current one, I defined the schedule, divided the roles & responsibilities among team members, follow up the progress. Finally, the team has made a great cost saving of $2.5M in 20xx. | |||
| 20xx/01—20xx/05 | Intel(Shanghai) Technology Development Ltd.Company | ||
| Industry: Electronics/Semiconductor/IC Intel STTD-China Department Electronics Development Engineer Responsibilities： I had been working in STTD-China since Jan 20xx to May 20xx as a senior module engineer. At that time, as a main contributor of this project, we succeeded in developing a set of MASSIVELY PARALLEL CLASS TEST equipment, which is able to test more than 6700 units in one time. Report Directly to: Hopman Mark Number of Subordinate: 14 Reference: Bao Powel Reason for Leaving: I was transferred to Intel（Shanghai）Products Ltd. Company due to the internal re-organization in June of 20xx. Achievements: As a main contributor of STTD-China department, I co-work with my colleagues to succeed in developing a set of MASSIVELY PARALLEL CLASS TEST equipment, which is able to test more than 6700 units in one cycle. | |||
| 20xx/05—20xx/01 | Nanyang University of Science & Technology | ||
| Industry: Electronics/Semiconductor/IC Electronics & Electrical Engineering Department Research Fellow Responsibilities： I work in Electronics & Electrical Engineering Department of Nanyang University of Science & Technology as a Research Fellow. I majored at Gate Oxide Reliability Research in the duration. Report Directly to: Professor Pey Kin Leoh Subordinate: 3 Reference: Patrick Low Reason for Leaving: I completed the project which I undertook by myself, and want to do more challenging job. Achievements: In less than one year, I made a lot of experiments and acquired the wonderful data for the project by myself. | |||
| Project Experience | |||
| 20xx/01—Present | Assembly NPI (New Product Introduction) | ||
| Project Description: To introduce more products into Intel Flash Assembly factory, I join Assembly NPI team and work as the team leader. I coordinate with IE, Planner, Marketing guy and Engineer to select new product items, do demo in factory, and then qualify it. Responsibility: I am working as NPI Team leader and coordinate all team members, define the NPI candidate, make Assembly build plan, follow up the progress. | |||
| 20xx/01—20xx/12 | Marginal Electrical Boards Rescue | ||
| Project Description: To rescue some electrical boards of testing equipment, a Task Force team was built up and led by me. We categorized each kind of board, made historical failure analysis on each kind of board and around &2.5 million dollars was saved finally. Responsibility: Being the team leader, I took the job of data analysis, define each member's role, make program plan, coordinate each team member and follow up the progress. | |||
| 20xx/10—20xx/05 | Optimization the current Test Process Order for Flash Memory | ||
| Project Description: To simplify the current Test procedure and enhance the working efficiency, a Task Force team has been called and started by me. Responsibility: Being the Project leader, I take the main responsibility, such as, design, plan, organize and implement. | |||
| 20xx/05—20xx/12 | Test Yield of Flash memory Improvement | ||
| Project Description: To improve the test yield of different products, a Task Force team was built up and led by me. Being the team leader, I worked with all team members to dig out the failure root cause for each product, defined action taken plan for each emergency case, coordinated each team member and make pro-active plan to avoided unexpected things happen. Responsibility: Being the team leader of Improving Test Yield, coordinate each team member, make program plan and follow up. | |||
| Education and Training | |||
| 20xx/05—20xx/01 | Nanyang University of Science & Technology Microelectronics Doctorate | ||
| I worked in Nan yang University of Science & Technology as a Research Fellow. I major at Gate oxide Reliability research in the duration. | |||
| 20xx/03—20xx/03 | Seoul National University of Korea Microelectronics Others | ||
| I had been working in National Physical Lab of Seoul National University in Korea since March of 20xx to March of 20xx as a Post-doctor. Where I unhook the project of research & development of Carbon-Nan tube Biosensor. And only after one year, an EIS sensor based on CMOS technology has been successfully produced. And one SCI paper about it has been published in Semiconductor Science and Technology. | |||
| 20xx/03—20xx/03 | Shanghai Institute of Microsystems and Information Technology，Chinese Academy of Sciences Information Technology Doctorate | ||
| 20xx/09—20xx/03 | Nanjing University of Science & Technology Material Science and Engineering Master | ||
| Being a master student of this period, I have published one EI paper about Super-fine metal power's electrical characteristics. | |||
| 20xx/09—20xx/07 | Nanjing University of Science & Technology Material Science and Engineering Bachelor | ||
| 20xx/07—20xx/07 | Assistant Engineer in Quality Verification Department, Boiler Factory in Zhengzhou city of Henan resistant Engineer in Quality Verification Department | ||
| Professional Skills | |||
| Language Skills： | English: EXCELLENT Korean: AVERAGE | ||
| Computer Skills： | Technology skilled 96Month SAP understanding 8Month | ||
| Certificate： | 20xx/11 MCSE 20xx/06 CET6 | ||
| Self-appraisal | |||
| 7 years working experience of Semiconductor Industry and where 2 years overseas working/study experience. Smart working, innovation thinking and very talented creative working model. |
数据库开发工程师英文简历表格
求职者所编写的个人简历是求职者的敲门砖，一份个人简历必须要有自己的价值，才能实现其作用。人们在编写个人简历上追求高质量，就是为了提高其价值，有价值的个人简历的才会有分量，在求职的过程中才能更好的提高其通过率。 因此说，个人简历的价值性是编写个人简历的.核心原则之一。
你所编写的个人简历是给用人单位的招聘官看的，而不是自己看的。在个人简历上必须要有较高的阅读性，才能体现出个人简历的作用来。 而个人简历的阅读性也是由其条例性所体现，个人简历的的核心原则之一条理性，不仅能够突出个人简历的阅读性，也能够利于突出人才求职的优势。
此外，在编写个人简历上，还要有真实性以及针对性。 一份个人简历如果失去了真实性，也就是失去了其价值。用人单位肯定是不会录用一份满篇谎言的个人简历，而你所写的个人简历也需要具有针对性，这是用人单位在招聘信息上的要求，而且所针对的求职意向也是个人简历中的核心部分。
|
电子工程师英文简历范例
BACKGROUND SUMMARY
Over eleven years of extensive computer/electronics experience.Versed in both digital and analog electronics withspecific emphasis on computer hardware/software.Special expertise in system and component evaluation.Network supervisor responsible for installing/maintaining Arcnet LAN system.Proficient in assembly and C programming languages.Excelent communication skills including written,verbal and interpersonal.
PROFESSIONAL WORK EXPERIENCE
Stevenson Data Systems,Los Angeles,CA 1981-1993
Components Evaluation Engineer 1992-1993
Responsible for the characterization and evaluation of, and approved vendors list for:Power supplies,oscillators,crystals,and programmable logic used in desktop and laptop computers.Evaluated and recommended quality components that increased product profitability.Created adn developed power supply test plan used for evqluating third party power supplies.Interacted with vendors to resolve problems associated with components qualification.Technical advisor for Purchasing.Promoted to engineer II.
Design Evaluation Engineer 1990-1992
Evaluated new computer product designs ,solving environmental problems on prototype computers.Conducted systems analysis on new computer profucts to ensure hardware,software and mechanical design integrity.Designed hardware and software for PC,ISA bus programmable load board used for environmental testing.Performed reliability lift testing on computer systems.Installed/maintained 20 user.Novell,Arcnet LAN system.Examined system and sub-system susceptibility to electrostatic discharge in order to meet IEC-801-2 industry standards.Analyzed complete power and load of computer system and subsystem to verify power and load estimations.
Assistant Engineer 1981-1990
Performed extensive hardware evaluation ion prototype computers,tested prototype units for timing violation using the latest state-of-the-art test equipment,digital oscilloscopes and logic analyzers.Performed emvironmental,ESD and acoustic testing.Designed and built a power-up test used to test prototype computers during cold boot.
EDUCATION
Bachelor of Science in Electrical Engineering
--University of Southern California 1990
Associate in Engineering Electronics
--University of Southern California 1981
Job descriptions emphasize candidate's accomploshments.
Work history is stated in reverse chronological order,with most recent employment listed first.
英文简历模板：电子工程师英文简历范例
ELECTRONICS ENGINEER(Experienced)
BACKGROUND SUMMARY
Over eleven years of extensive computer/electronics experience.Versed in both digital and analog electronics withspecific emphasis on computer hardware/software.Special expertise in system and component evaluation.Network supervisor responsible for installing/maintaining Arcnet LAN system.Proficient in assembly and C programming languages.Excelent communication skills including written,verbal and interpersonal.
PROFESSIONAL WORK EXPERIENCE
Stevenson Data Systems,Los Angeles,CA 1981-1993
Components Evaluation Engineer 1992-1993
Responsible for the characterization and evaluation of, and approved vendors list for:Power supplies,oscillators,crystals,and programmable logic used in desktop and laptop computers.Evaluated and recommended quality components that increased product profitability.Created adn developed power supply test plan used for evqluating third party power supplies.Interacted with vendors to resolve problems associated with components qualification.Technical advisor for Purchasing.Promoted to engineer II.
Design Evaluation Engineer 1990-1992
Evaluated new computer product designs ,solving environmental problems on prototype computers.Conducted systems analysis on new computer profucts to ensure hardware,software and mechanical design integrity.Designed hardware and software for PC,ISA bus programmable load board used for environmental testing.Performed reliability lift testing on computer systems.Installed/maintained 20 user.Novell,Arcnet LAN system.Examined system and sub-system susceptibility to electrostatic discharge in order to meet IEC-801-2 industry standards.Analyzed complete power and load of computer system and subsystem to verify power and load estimations.
Assistant Engineer 1981-1990
Performed extensive hardware evaluation ion prototype computers,tested prototype units for timing violation using the latest state-of-the-art test equipment,digital oscilloscopes and logic analyzers.Performed emvironmental,ESD and acoustic testing.Designed and built a power-up test used to test prototype computers during cold boot.
EDUCATION
Bachelor of Science in Electrical Engineering
--University of Southern California 1990
Associate in Engineering Electronics
--University of Southern California 1981
Job descriptions emphasize candidate's accomploshments.
Work history is stated in reverse chronological order,with most recent employment listed first.
电子工程师英文简历模板
ELECTRONICS ENGINEER(Experienced)Sandy Lin 15/F,TOWER2 ,BRIGHT CHINA,BUILDING1,BEIJING.
BACKGROUND SUMMARY
Over eleven years of extensive computer/electronics experience.Versed in both digital and analog electronics withspecific emphasis on computer hardware/software.Special expertise in system and component evaluation.Network supervisor responsible for installing/maintaining Arcnet LAN system.Proficient in assembly and C programming languages.Excelent communication skills including written,verbal and interpersonal.
PROFESSIONAL WORK EXPERIENCE
Stevenson Data Systems,Los Angeles,CA 1981-1993
Components Evaluation Engineer 1992-1993
Responsible for the characterization and evaluation of, and approved vendors list for:Power supplies,oscillators,crystals,and programmable logic used in desktop and laptop computers.Evaluated and recommended quality components that increased product profitability.Created adn developed power supply test plan used for evqluating third party power supplies.Interacted with vendors to resolve problems associated with components qualification.Technical advisor for Purchasing.Promoted to engineer II.
Design Evaluation Engineer 1990-1992
Evaluated new computer product designs ,solving environmental problems on prototype computers.Conducted systems analysis on new computer profucts to ensure hardware,software and mechanical design integrity.Designed hardware and software for PC,ISA bus programmable load board used for environmental testing.Performed reliability lift testing on computer systems.Installed/maintained 20 user.Novell,Arcnet LAN system.Examined system and sub-system susceptibility to electrostatic discharge in order to meet IEC-801-2 industry standards.Analyzed complete power and load of computer system and subsystem to verify power and load estimations.
Assistant Engineer 1981-1990
Performed extensive hardware evaluation ion prototype computers,tested prototype units for timing violation using the latest state-of-the-art test equipment,digital oscilloscopes and logic analyzers.Performed emvironmental,ESD and acoustic testing.Designed and built a power-up test used to test prototype computers during cold boot.
EDUCATION
Bachelor of Science in Electrical Engineering
--University of Southern California 1990
Associate in Engineering Electronics
--University of Southern California 1981
Job descriptions emphasize candidate’s accomploshments.
Work history is stated in reverse chronological order,with most recent employment listed first.
电子工程师英文简历
ELECTRONICS ENGINEER(Experienced)
Sandy Lin 15/F,TOWER2 ,BRIGHT CHINA,BUILDING1,BEIJING.
BACKGROUND SUMMARY
Over eleven years of extensive computer/electronics experience.Versed in both digital and analog electronics withspecific emphasis on computer hardware/software.Special expertise in system and component evaluation.Network supervisor responsible for installing/maintaining Arcnet LAN system.Proficient in assembly and C programming languages.Excelent communication skills including written,verbal and interpersonal.
PROFESSIONAL WORK EXPERIENCE
Stevenson Data Systems,Los Angeles,CA 1981-1993
Components Evaluation Engineer 1992-1993
Responsible for the characterization and evaluation of, and approved vendors list for:Power supplies,oscillators,crystals,and programmable logic used in desktop and laptop computers.Evaluated and recommended quality components that increased product profitability.Created adn developed power supply test plan used for evqluating third party power supplies.Interacted with vendors to resolve problems associated with components qualification.Technical advisor for Purchasing.Promoted to engineer II.
Design Evaluation Engineer 1990-1992
Evaluated new computer product designs ,solving environmental problems on prototype computers.Conducted systems analysis on new computer profucts to ensure hardware,software and mechanical design integrity.Designed hardware and software for PC,ISA bus programmable load board used for environmental testing.Performed reliability lift testing on computer systems.Installed/maintained 20 user.Novell,Arcnet LAN system.Examined system and sub-system susceptibility to electrostatic discharge in order to meet IEC-801-2 industry standards.Analyzed complete power and load of computer system and subsystem to verify power and load estimations.
Assistant Engineer 1981-1990
Performed extensive hardware evaluation ion prototype computers,tested prototype units for timing violation using the latest state-of-the-art test equipment,digital oscilloscopes and logic analyzers.Performed emvironmental,ESD and acoustic testing.Designed and built a power-up test used to test prototype computers during cold boot.
EDUCATION
Bachelor of Science in Electrical Engineering
--University of Southern California 1990
Associate in Engineering Electronics
--University of Southern California 1981
Job descriptions emphasize candidate's accomploshments.
Work history is stated in reverse chronological order,with most recent employment listed first.
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